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FDH15N50 / FDP15N50 / FDB15N50 August 2003 FDH15N50 / FDP15N50 / FDB15N50 15A, 500V, 0.38 Ohm, N-Channel SMPS Power MOSFET Applications Switch Mode Power Supplies(SMPS), such as * PFC Boost * Two-Switch Forward Converter * Single Switch Forward Converter * Flyback Converter * Buck Converter * High Speed Switching Features * Low Gate Charge Requirement Qg results in Simple Drive * Improved Gate, Avalanche and High Reapplied dv/dt Ruggedness * Reduced rDS(ON) * Reduced Miller Capacitance and Low Input Capacitance * Improved Switching Speed with Low EMI * 175C Rated Junction Temperature Package SOURCE DRAIN GATE GATE SOURCE DRAIN (FLANGE) DRAIN (FLANGE) SOURCE DRAIN GATE Symbol D G S TO-263AB DRAIN (BOTTOM) FDB SERIES TO-247 FDH SERIES TO-220AB FDP SERIES Absolute Maximum Ratings TC = 25oC unless otherwise noted Symbol VDSS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current ID Continuous (TC = 25oC, VGS = 10V) Continuous (TC = 100 C, VGS = 10V) Pulsed1 PD TJ, TSTG Power dissipation Derate above 25oC Operating and Storage Temperature Soldering Temperature for 10 seconds o Ratings 500 30 15 11 60 300 2 -55 to 175 300 (1.6mm from case) Units V V A A A W W/oC o o C C Thermal Characteristics RJC RJA RJA Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient (TO-247) Thermal Resistance Junction to Ambient (TO-220, TO-263) 0.50 40 62 o C/W C/W oC/W o (c)2003 Fairchild Semiconductor Corporation FDH15N50 / FDP15N50 / FDB15N50 RevD2 FDH15N50 / FDP15N50 / FDB15N50 Package Marking and Ordering Information Device Marking FDH15N50 FDP15N50 FDB15N50 Device FDH15N50 FDP15N50 FDB15N50 Package TO-247 TO-220 TO-263 Reel Size Tube Tube 330mm Tape Width 24mm Quantity 30 50 800 Electrical Characteristics TJ = 25C (unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Units Statics BVDSS Drain to Source Breakdown Voltage ID = 250A, VGS = 0V Reference to 25oC, ID = 1mA VGS = 10V, ID = 7.5A VDS = VGS, ID = 250A VDS = 500V VGS = 0V VGS = 30V TC = 25oC TC = 150oC 500 2.0 0.58 0.33 3.4 0.38 4.0 25 250 100 V V/C V A nA BVDSS/TJ Breakdown Voltage Temp. Coefficient rDS(ON) VGS(th) IDSS IGSS Drain to Source On-Resistance Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Dynamics gfs Qg(TOT) Qgs Qgd td(ON) tr td(OFF) tf CISS COSS CRSS Forward Transconductance Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain "Miller" Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VDD = 10V, ID = 7.5A VGS = 10V, VDS = 400V, ID = 15A VDD = 250V, ID = 15A, RG = 6.2, RD = 17 VDS = 25V, VGS = 0V, f = 1MHz 10 33 7.2 12 9 5.4 26 5 1850 230 16 41 10 16 S nC nC nC ns ns ns ns pF pF pF Avalanche Characteristics EAS IAR Single Pulse Avalanche Energy2 Avalanche Current 760 15 mJ A Drain-Source Diode Characteristics IS ISM VSD trr QRR Notes: 1: Repetitive rating; pulse width limited by maximum junction temperature 2: Starting TJ = 25C, L = 7.0mH, IAS = 15A Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 MOSFET symbol showing the integral reverse p-n junction diode. ISD = 15A D - 0.86 470 5 15 60 1.2 730 6.6 A A V ns C G S Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge ISD = 15A, diSD/dt = 100A/s ISD = 15A, diSD/dt = 100A/s (c)2003 Fairchild Semiconductor Corporation FDH15N50 / FDP15N50 / FDB15N50 RevD2 FDH15N50 / FDP15N50 / FDB15N50 Typical Characteristics 100 ID, DRAIN TO SOURCE CURRENT (A) ID, DRAIN TO SOURCE CURRENT (A) TJ = 25oC VGS DESCENDING 10V 6.5V 6V 5.5V 5V 4.5V 100 TJ = 175oC VGS DESCENDING 10V 6V 5.5V 5V 4.5V 4V 10 10 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1 1 10 100 1 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 1. Output Characteristics 60 PULSE DURATION = 80s 3.5 Figure 2. Output Characteristics NORMALIZED ON RESISTANCE ID , DRAIN CURRENT (A) DUTY CYCLE = 0.5% MAX 50 VDD = 100V 40 PULSE DURATION = 80s 3.0 2.5 2.0 1.5 1.0 VGS = 10V, ID = 7.5A 0.5 0 -50 DUTY CYCLE = 0.5% MAX 30 TJ = 20 175oC TJ = 25oC 10 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 -25 0 25 50 75 100 125 o 150 175 VGS , GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE ( C) Figure 3. Transfer Characteristics Figure 4. Normalized Drain To Source On Resistance vs Junction Temperature 15 4000 VGS , GATE TO SOURCE VOLTAGE (V) CISS ID = 15A 12 100V 250V 9 C, CAPACITANCE (pF) 1000 COSS 400V 6 100 CRSS VGS = 0V, f = 1MHz 10 1 10 100 3 0 0 10 20 30 40 50 VDS , DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 5. Capacitance vs Drain To Source Voltage Figure 6. Gate Charge Waveforms For Constant Gate Current (c)2003 Fairchild Semiconductor Corporation FDH15N50 / FDP15N50 / FDB15N50 RevD2 FDH15N50 / FDP15N50 / FDB15N50 Typical Characteristics ISD , SOURCE TO DRAIN CURRENT (A) 30 100 TC = 25oC 25 100s 20 ID, DRAIN CURRENT (A) 10 1ms 15 TJ = 175oC TJ = 25oC 10 1.0 OPERATION IN THIS AREA LIMITED BY RDS(ON) 10ms 5 DC 0 0.3 0.1 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1 10 100 1000 VSD , SOURCE TO DRAIN VOLTAGE (V) VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Body Diode Forward Voltage vs Body Diode Current 16 Figure 8. Maximum Safe Operating Area 50 12 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 10 STARTING TJ = 25oC 8 4 STARTING TJ = 150oC 0 25 50 75 100 125 o 150 175 1 0.01 0.1 1 10 50 TC, CASE TEMPERATURE ( C) tAV, TIME IN AVALANCHE (ms) Figure 9. Maximum Drain Current vs Case Temperature ZJC , NORMALIZED THERMAL RESPONSE Figure 10. Unclamped Inductive Switching Capability 100 0.50 0.20 10 -1 t1 0.10 0.05 0.02 0.01 SINGLE PULSE 10-4 10-3 10-2 10-1 100 101 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC 10-2 -5 10 t1 , RECTANGULAR PULSE DURATION (s) Figure 11. Normalized Transient Thermal Impedance, Junction to Case (c)2003 Fairchild Semiconductor Corporation FDH15N50 / FDP15N50 / FDB15N50 RevD2 FDH15N50 / FDP15N50 / FDB15N50 Test Circuits and Waveforms VDS tP L IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP 0V RG - BVDSS VDS VDD + VDD IAS 0.01 0 tAV Figure 12. Unclamped Energy Test Circuit Figure 13. Unclamped Energy Waveforms VDS RL VDD Qg(TOT) VDS VGS VGS = 10V + VDD DUT Ig(REF) 0 VGS VGS = 1V Qg(TH) Qgs Ig(REF) 0 Qgd Figure 14. Gate Charge Test Circuit Figure 15. Gate Charge Waveforms VDS tON td(ON) RL VDS 90% tr tOFF td(OFF) tf 90% VGS + VDD DUT 0 10% 10% 90% VGS 50% PULSE WIDTH 50% RGS VGS 0 10% Figure 16. Switching Time Test Circuit Figure 17. Switching Time Waveform (c)2003 Fairchild Semiconductor Corporation FDH15N50 / FDP15N50 / FDB15N50 RevD2 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACTTM ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST(R) BottomlessTM FASTrTM CoolFETTM CROSSVOLTTM FRFETTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM EnSignaTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER ImpliedDisconnectTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TruTranslationTM UHCTM UltraFET(R) VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production Rev. I3 |
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